Skip to content

Ensure RTC clock scaling is set to 1Hz #350

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Dec 14, 2016
Merged

Ensure RTC clock scaling is set to 1Hz #350

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
7 changes: 6 additions & 1 deletion variants/arduino_101/variant.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -240,7 +240,12 @@ void initVariant( void )
variantGpioInit();
variantPwmInit();
variantAdcInit();


//set RTC clock divider to 32768(1 Hz)
*SYS_CLK_CTL |= RTC_DIV_1HZ_MASK;
*SYS_CLK_CTL &= ~(1 << CCU_RTC_CLK_DIV_EN);
*SYS_CLK_CTL |= 1 << CCU_RTC_CLK_DIV_EN;

cfw_platform_init();

// Add for debug corelib
Expand Down
8 changes: 8 additions & 0 deletions variants/arduino_101/variant.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -146,6 +146,14 @@ extern "C"{
#define ADC_RESOLUTION 12
#define ADC_CLOCK_GATE (1 << 31)

/*
* Clocking
*/

#define SYS_CLK_CTL (volatile int*)0xB0800038
#define CCU_RTC_CLK_DIV_EN 2
#define RTC_DIV_1HZ_MASK 0x00000078

#define digitalPinToBitMask(P) (1 << g_APinDescription[P].ulGPIOId)

//static uint8_t __unused_var_POR;
Expand Down