@@ -110,6 +110,7 @@ typedef struct sStatSpi
110
110
int txErr ;
111
111
int rxErr ;
112
112
int wrongFrame ;
113
+ int frameDisalign ;
113
114
int lastCmd ;
114
115
int lastError ;
115
116
unsigned long status ;
@@ -127,6 +128,7 @@ void initStatSpi()
127
128
statSpi .timeoutErr = 0 ;
128
129
statSpi .timeoutIntErr = 0 ;
129
130
statSpi .wrongFrame = 0 ;
131
+ statSpi .frameDisalign = 0 ;
130
132
}
131
133
132
134
void printStatSpi ()
@@ -139,6 +141,7 @@ void printStatSpi()
139
141
printk ("spiTmoErr\t: 0x%x\n" , statSpi .timeoutErr );
140
142
printk ("spiTmoIntErr\t: 0x%x\n" , statSpi .timeoutIntErr );
141
143
printk ("wrongFrame\t: 0x%x\n" , statSpi .wrongFrame );
144
+ printk ("disalFrame\t: 0x%x\n" , statSpi .frameDisalign );
142
145
}
143
146
144
147
cmd_state_t
@@ -259,30 +262,6 @@ void showTTCPstatus()
259
262
tcp_debug_print_pcbs ();
260
263
}
261
264
262
-
263
- inline spi_status_t myspi_read (volatile avr32_spi_t * spi , unsigned short * data )
264
- {
265
- if (spi -> sr & AVR32_SPI_SR_RDRF_MASK )
266
- * data = spi -> rdr >> AVR32_SPI_RDR_RD_OFFSET ;
267
- return SPI_OK ;
268
- }
269
-
270
- inline spi_status_t myspi_write (volatile avr32_spi_t * spi , unsigned short data )
271
- {
272
- unsigned int timeout = SPI_TIMEOUT ;
273
-
274
- while (!(spi -> sr & AVR32_SPI_SR_TDRE_MASK )) {
275
- if (!timeout -- ) {
276
- return SPI_ERROR_TIMEOUT ;
277
- }
278
- }
279
-
280
- spi -> tdr = data << AVR32_SPI_TDR_TD_OFFSET ;
281
-
282
- return SPI_OK ;
283
- }
284
-
285
-
286
265
int write_stream (volatile avr32_spi_t * spi , const char * stream , uint16_t len )
287
266
{
288
267
uint16_t _len = 0 ;
@@ -307,44 +286,19 @@ int write_stream(volatile avr32_spi_t *spi, const char *stream, uint16_t len)
307
286
else
308
287
{
309
288
stream ++ ;
310
- unsigned long data = ARD_SPI -> rdr ;
311
- data = data ;
289
+ spi_read (spi ,& dummy );
312
290
}
313
291
//SIGN1_UP();
314
-
315
- // if (myspi_read(spi, &dummy) == SPI_ERROR_TIMEOUT)
316
- // {
317
- // statSpi.timeoutErr++;
318
- // statSpi.rxErr++;
319
- // statSpi.lastError = SPI_ERROR_TIMEOUT;
320
- // statSpi.status = spi_getStatus(spi);
321
- // return SPI_ERROR_TIMEOUT;
322
- // }
323
292
}while ((!streamExit )&& (_len ++ <= len ));
324
- end_write = true;
325
-
326
- //while (spi_readRegisterFullCheck(spi));
327
- spi_read (spi ,& dummy );
328
- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
329
- {
330
- int a = 0 ;
331
- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
332
- a = rand ();
333
- a = a + 5 ;
334
- }
335
-
336
- if (!streamExit )
337
- {
293
+
294
+ if (!streamExit )
295
+ {
338
296
#ifdef _SPI_STATS_
339
- statSpi .wrongFrame ++ ;
340
- statSpi .lastError = SPI_ERROR_ARGUMENT ;
297
+ statSpi .wrongFrame ++ ;
298
+ statSpi .lastError = SPI_ERROR_ARGUMENT ;
341
299
#endif
342
- return SPI_ERROR_ARGUMENT ;
343
- }
344
- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
345
- {
346
- //SIGN1_DN();
347
- }
300
+ return SPI_ERROR_ARGUMENT ;
301
+ }
348
302
return SPI_OK ;
349
303
}
350
304
@@ -357,21 +311,23 @@ void sendError()
357
311
while (!spi_writeRegisterEmptyCheck (& AVR32_SPI ));
358
312
}
359
313
BUSY_FOR_SPI ();
360
- WARN ("Send SPI error!" );
314
+ WARN ("Send SPI error!\n " );
361
315
}
362
316
363
- #define ENABLE_SPI_INT () do { \
317
+ #define ENABLE_SPI_INT () do { \
318
+ volatile avr32_spi_t *spi = ARD_SPI; \
364
319
Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
365
320
if (global_interrupt_enabled) Disable_global_interrupt(); \
366
- ARD_SPI ->IER.rdrf = 1; \
367
- ARD_SPI ->IER.rxbuff = 1; ARD_SPI ->IER.endrx = 1; \
321
+ spi ->IER.rdrf = 1; \
322
+ spi ->IER.rxbuff = 1; spi ->IER.endrx = 1; \
368
323
if (global_interrupt_enabled) Enable_global_interrupt(); \
369
324
}while(0);
370
325
371
326
#define DISABLE_SPI_INT () do { \
327
+ volatile avr32_spi_t *spi = ARD_SPI; \
372
328
Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
373
329
if (global_interrupt_enabled) Disable_global_interrupt(); \
374
- ARD_SPI ->IDR.rdrf = 1; ARD_SPI ->IDR.rxbuff = 1; ARD_SPI ->IDR.endrx = 1; \
330
+ spi ->IDR.rdrf = 1; spi ->IDR.rxbuff = 1; spi ->IDR.endrx = 1; \
375
331
if (global_interrupt_enabled) Enable_global_interrupt(); \
376
332
}while(0);
377
333
@@ -1494,6 +1450,8 @@ bool checkMsgFormat(uint8_t* _recv, int len, int* offset)
1494
1450
if ((enableDebug & INFO_WARN_FLAG )&& (len < 20 )) //TODO stamp only short messages wrong
1495
1451
dump ((char * )_recv , len );
1496
1452
1453
+ STATSPI_DISALIGN_ERROR ();
1454
+
1497
1455
if (recv == NULL )
1498
1456
return false;
1499
1457
}
@@ -1552,15 +1510,6 @@ void spi_poll(struct netif* netif) {
1552
1510
receivedChars = 0 ;
1553
1511
count = 0 ;
1554
1512
state = SPI_CMD_IDLE ;
1555
- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
1556
- {
1557
- unsigned long data = ARD_SPI -> rdr ;
1558
- data = data ;
1559
- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
1560
- {
1561
- //SIGN1_DN();
1562
- }
1563
- }
1564
1513
}
1565
1514
else
1566
1515
{
@@ -1577,9 +1526,18 @@ void spi_poll(struct netif* netif) {
1577
1526
//Available for receiving a new spi data
1578
1527
AVAIL_FOR_SPI ();
1579
1528
}
1529
+
1530
+ #ifdef _SPI_STATS_
1531
+ if (statSpi .lastError != 0 )
1532
+ {
1533
+ WARN ("[E(0x%x) spiStatus:0x%x]\n" , statSpi .lastError , statSpi .status );
1534
+ statSpi .lastError = 0 ;
1535
+ }
1536
+ #endif
1580
1537
}
1581
1538
1582
- inline int spi_slaveReceiveInt (volatile avr32_spi_t * spi , bool startRecvd )
1539
+ // ****TEMPORARY
1540
+ /*inline*/ int spi_slaveReceiveInt (volatile avr32_spi_t * spi , bool startRecvd )
1583
1541
{
1584
1542
receivedChars = 0 ;
1585
1543
int index = 0 ;
@@ -1595,20 +1553,15 @@ inline int spi_slaveReceiveInt(volatile avr32_spi_t *spi, bool startRecvd)
1595
1553
}
1596
1554
do {
1597
1555
err = SPI_OK ;
1598
- //SIGN1_DN();
1599
- //spi->tdr = DUMMY_DATA << AVR32_SPI_TDR_TD_OFFSET;
1556
+
1600
1557
while ((spi -> sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK )) !=
1601
1558
(AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK )) {
1602
- if (! timeout -- ) {
1559
+ if (( timeout -- ) == 0 ) {
1603
1560
err = SPI_ERROR_TIMEOUT ;
1604
1561
break ;
1605
1562
}
1606
1563
}
1607
1564
_receiveBuffer [index ] = (spi -> rdr >> AVR32_SPI_RDR_RD_OFFSET ) & 0x00ff ;
1608
- if (_receiveBuffer [index ] == START_CMD ){
1609
- TOGGLE_SIG0 ();
1610
- //SIGN1_UP();
1611
- }
1612
1565
if (err == SPI_OK ) {
1613
1566
++ index ;
1614
1567
++ receivedChars ;
@@ -1629,51 +1582,35 @@ inline int spi_slaveReceiveInt(volatile avr32_spi_t *spi, bool startRecvd)
1629
1582
return err ;
1630
1583
}
1631
1584
1632
-
1633
- uint32_t data = 0 ;
1634
- uint32_t status_register = 0 ;
1635
-
1636
1585
#if defined (__GNUC__ )
1637
1586
__attribute__((__interrupt__ ))
1638
1587
#elif defined (__ICCAVR32__ )
1639
1588
__interrupt
1640
1589
#endif
1641
1590
static void spi_int_handler (void )
1642
1591
{
1643
- //SIGN2_DN();
1592
+ volatile avr32_spi_t * spi = ARD_SPI ;
1593
+ //DEB_PIN_DN();
1644
1594
//eic_clear_interrupt_line(&AVR32_EIC, AVR32_SPI0_IRQ);
1645
1595
AVAIL_FOR_SPI ();
1646
1596
DISABLE_SPI_INT ();
1647
1597
1648
- //TODO verify why after the reply write the RDRF is set
1649
1598
unsigned short dummy = 0 ;
1650
- if ((end_write )&& ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )) {
1651
- end_write = false;
1652
- //SIGN1_UP();
1653
- spi_read (ARD_SPI , & dummy );
1654
- }
1655
1599
1656
- if (((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )|| (dummy == START_CMD ))
1600
+ if (((spi -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )|| (dummy == START_CMD ))
1657
1601
{
1658
1602
int err = spi_slaveReceiveInt (ARD_SPI , dummy == START_CMD );
1659
- if (err ! = SPI_OK )
1603
+ if (err = = SPI_OK )
1660
1604
{
1661
- #ifdef _SPI_STATS_
1662
- //TODO verify why at the end of cmd cycle RDF bit is high without any data recv.
1663
- if (statSpi .lastError != SPI_ERROR_TIMEOUT )
1664
- INFO_SPI ("[E(0x%x):%d spiStatus:%d]\n" , statSpi .lastError , err , statSpi .status );
1665
- #endif
1666
- }else {
1667
1605
BUSY_FOR_SPI ();
1668
1606
startReply = true;
1669
1607
//maintain disable interrupt to send the reply command
1670
- //SIGN2_UP ();
1608
+ //DEB_PIN_UP ();
1671
1609
return ;
1672
1610
}
1673
-
1674
1611
}
1675
1612
ENABLE_SPI_INT ();
1676
- //SIGN2_UP ();
1613
+ //DEB_PIN_UP ();
1677
1614
}
1678
1615
1679
1616
inline spi_status_t spi_read8 (volatile avr32_spi_t * spi , unsigned char * data )
0 commit comments