From 2dc711a3d7e042e6b21cdd04b7afac2aa51f90b6 Mon Sep 17 00:00:00 2001 From: maidnl Date: Fri, 16 May 2025 10:59:12 +0200 Subject: [PATCH 1/2] Test-me: rebased dts files (not working) --- .../portenta-x8/imx8mm-evk-u-boot.dtsi | 104 +-- .../u-boot-imx/portenta-x8/imx8mm-evk.dts | 598 ++++++++++++++++-- .../portenta-x8/imx8mm_evk_defconfig | 4 +- .../recipes-bsp/u-boot/u-boot-imx_%.bbappend | 12 +- 4 files changed, 569 insertions(+), 149 deletions(-) diff --git a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi index b9dd849..e1aa453 100644 --- a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi +++ b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi @@ -39,35 +39,29 @@ }; }; -&aips4 { +&{/soc@0} { + u-boot,dm-pre-reloc; u-boot,dm-spl; }; -®_usdhc2_vmmc { - u-boot,off-on-delay-us = <20000>; - u-boot,dm-spl; +&A53_0 { + /delete-property/ cpu-idle-states; }; -&pinctrl_reg_usdhc2_vmmc { - u-boot,dm-spl; +&A53_1 { + /delete-property/ cpu-idle-states; }; -&pinctrl_uart2 { - u-boot,dm-spl; +&A53_2 { + /delete-property/ cpu-idle-states; }; -&pinctrl_usdhc2_gpio { - u-boot,dm-spl; +&A53_3 { + /delete-property/ cpu-idle-states; }; - -&pinctrl_usdhc2 { +&i2c2 { u-boot,dm-spl; }; - -&pinctrl_usdhc3 { - u-boot,dm-spl; -}; - &gpio1 { u-boot,dm-spl; }; @@ -88,45 +82,6 @@ u-boot,dm-spl; }; -&uart2 { - u-boot,dm-spl; -}; - -&crypto { - u-boot,dm-spl; -}; - -&sec_jr0 { - u-boot,dm-spl; -}; - -&sec_jr1 { - u-boot,dm-spl; -}; - -&sec_jr2 { - u-boot,dm-spl; -}; - -&usbmisc1 { - u-boot,dm-spl; -}; - -&usbphynop1 { - u-boot,dm-spl; -}; - -&usbotg1 { - u-boot,dm-spl; -}; - -&usdhc1 { - u-boot,dm-spl; - assigned-clocks = <&clk IMX8MM_CLK_USDHC1>; - assigned-clock-rates = <400000000>; - assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_400M>; -}; - &usdhc2 { u-boot,dm-spl; sd-uhs-sdr104; @@ -150,14 +105,15 @@ u-boot,dm-spl; }; -&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} { +&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { u-boot,dm-spl; }; -&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} { +&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { u-boot,dm-spl; }; + &pinctrl_i2c1 { u-boot,dm-spl; }; @@ -166,31 +122,27 @@ u-boot,dm-spl; }; -&pinctrl_wdog { - u-boot,dm-spl; -}; - &fec1 { - phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; - phy-reset-duration = <15>; - phy-reset-post-delay = <100>; -}; - -ðphy0 { - vddio0: vddio-regulator { - regulator-name = "VDDIO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; + phy-reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; + phy-reset-duration = <100>; + phy-reset-post-delay = <1>; }; &wdog1 { u-boot,dm-spl; }; -&usbotg1 { - status = "okay"; - extcon = <&ptn5110>; +&flexspi { + assigned-clock-rates = <100000000>; + assigned-clocks = <&clk IMX8MM_CLK_QSPI>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; +}; + +&lcdif { + enable_polarity_low; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + /delete-property/ assigned-clock-rates; }; &mipi_dsi { diff --git a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk.dts b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk.dts index 73d2061..4ff39b8 100644 --- a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk.dts +++ b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk.dts @@ -1,45 +1,330 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2019-2020 NXP +/** + * Copyright 2020 + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. */ /dts-v1/; #include -#include "imx8mm-evk.dtsi" +#include "imx8mm.dtsi" / { - model = "NXP i.MX8MM EVK board"; + model = "Arduino Portenta X8 i.MX8MM board"; compatible = "fsl,imx8mm-evk", "fsl,imx8mm"; chosen { - bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200"; + bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200"; + stdout-path = &uart3; }; - aliases { - spi0 = &flexspi; + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0 0x80000000>; }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_led>; + + ledR { + label = "ledR"; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + ledG { + label = "ledG"; + gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + ledB { + label = "ledB"; + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <20000>; + enable-active-high; + }; + + /* Y2 SIT1532AI */ + pmic_refclk: pmic-refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; +}; + +&A53_0 { + cpu-supply = <&buck2_reg>; +}; + +&A53_1 { + cpu-supply = <&buck2_reg>; +}; + +&A53_2 { + cpu-supply = <&buck2_reg>; }; -&flexspi { +&A53_3 { + cpu-supply = <&buck2_reg>; +}; + +&ddrc { + operating-points-v2 = <&ddrc_opp_table>; + + ddrc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-25M { + opp-hz = /bits/ 64 <25000000>; + }; + + opp-100M { + opp-hz = /bits/ 64 <100000000>; + }; + + opp-750M { + opp-hz = /bits/ 64 <750000000>; + }; + }; +}; + +&ecspi3 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; + num-cs = <1>; + cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&fec1 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexspi>; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + fsl,magic-packet; status = "okay"; - flash@0 { - reg = <0>; + mdio { #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - spi-max-frequency = <80000000>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + interrupt-parent = <&gpio3>; + interrupts = <7 0>; + reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; + reset-assert-us = <100000>; + }; }; }; +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + scl-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; + status = "okay"; + + pmic@4b { + compatible = "rohm,bd71847"; + reg = <0x4b>; + pinctrl-0 = <&pinctrl_pmic>; + interrupt-parent = <&gpio3>; + interrupts = <8 GPIO_ACTIVE_LOW>; + rohm,reset-snvs-powered; + + regulators { + buck1_reg: BUCK1 { + regulator-name = "BUCK1"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1250>; + }; + + buck2_reg: BUCK2 { + regulator-name = "BUCK2"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <1250>; + rohm,dvs-run-voltage = <1000000>; + rohm,dvs-idle-voltage = <900000>; + }; + + buck3_reg: BUCK3 { + // BUCK5 in datasheet + regulator-name = "BUCK3"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-boot-on; + regulator-always-on; + }; + + buck4_reg: BUCK4 { + // BUCK6 in datasheet + regulator-name = "BUCK4"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + buck5_reg: BUCK5 { + // BUCK7 in datasheet + regulator-name = "BUCK5"; + regulator-min-microvolt = <1605000>; + regulator-max-microvolt = <1995000>; + regulator-boot-on; + regulator-always-on; + }; + + buck6_reg: BUCK6 { + // BUCK8 in datasheet + regulator-name = "BUCK6"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1_reg: LDO1 { + regulator-name = "LDO1"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2_reg: LDO2 { + regulator-name = "LDO2"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "LDO3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4_reg: LDO4 { + regulator-name = "LDO4"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "LDO6"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&uart3 { /* console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&usbotg1 { + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + disable-over-current; + samsung,picophy-pre-emp-curr-control = <3>; + samsung,picophy-dc-vol-level-adjust = <7>; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + samsung,picophy-pre-emp-curr-control = <3>; + samsung,picophy-dc-vol-level-adjust = <7>; + status = "okay"; +}; + +&usdhc2 { + assigned-clocks = <&clk IMX8MM_CLK_USDHC2>; + assigned-clock-rates = <200000000>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + vmmc-supply = <®_usdhc2_vmmc>; + status = "okay"; +}; + &usdhc3 { assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>; - assigned-clock-rates = <400000000>; + /* TODO: lowered speed here from 400000000 */ + assigned-clock-rates = <200000000>; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; @@ -49,64 +334,239 @@ status = "okay"; }; +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + &iomuxc { - pinctrl_flexspi: flexspigrp { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_1>, <&pinctrl_hog_2>; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82 + MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82 + MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82 + >; + }; + + pinctrl_ecspi3_cs: ecspi3cs { + fsl,pins = < + // MX8MM_IOMUXC_UART2_TXD_ECSPI3_SS0 0x40000 + MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x40000 + >; + }; + + pinctrl_gpio_led: gpioledgrp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 + MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 + MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x19 + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 + MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 + MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f + MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f + MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f + MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f + MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 + MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 + MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 + MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 + MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f + MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 + MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 + MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f + MX8MM_IOMUXC_NAND_DATA00_GPIO3_IO6 0x16 + MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x41 + >; + }; + + pinctrl_i2c1: i2c1grp { fsl,pins = < - MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 - MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 - MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 - MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 - MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 - MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 + MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 + >; + }; + + pinctrl_i2c1_gpio: i2c1grp-gpio { + fsl,pins = < + MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x1c3 + MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x1c3 + >; + }; + + pinctrl_i2c2_gpio: i2c2grp-gpio { + fsl,pins = < + MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x1c3 + MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x1c3 + >; + }; + + pinctrl_i2c3_gpio: i2c3grp-gpio { + fsl,pins = < + MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1c3 + MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1c3 + >; + }; + + pinctrl_pmic: pmicirq { + fsl,pins = < + MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x141 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 + MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 + >; + }; + + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc { + fsl,pins = < + MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 + >; + }; + + pinctrl_usdhc2_gpio: usdhc2grpgpio { + fsl,pins = < + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 - MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 - MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 - MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 - MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 - >; - }; - - pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 - MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 - MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 - MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 - MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 - >; - }; - - pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 - MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 - MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 - MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 - MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 + >; + }; + + /* Some of these pins are leaved configured by internal ROM code */ + pinctrl_hog_1: hoggrp-1 { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x110 /* NRST_STM32 Pull Down */ + MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x110 /* BOOT0_STM32 Pull Down */ + MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x110 /* SWDIO_STM32 Pull Down */ + MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x110 /* SWCLK_STM32 Pull Down */ + MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x110 /* PA0_STM32 Pull Down M4 led red */ + MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x151 /* PC1_STM32 Pull Up IRQ */ + >; + }; + + /* Anx7625 pins */ + pinctrl_hog_2: hoggrp-2 { + fsl,pins = < + MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* POWER_EN */ + MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x51 /* CABLE_DET */ + MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20 0x151 /* ALERT_N */ + MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x19 /* RESET_N */ + MX8MM_IOMUXC_SAI1_TXD1_GPIO4_IO13 0x19 /* VBUS_CTL */ + MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x19 /* EN_I2S */ >; }; }; diff --git a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm_evk_defconfig b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm_evk_defconfig index 1cb6bfc..ea54f53 100644 --- a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm_evk_defconfig +++ b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm_evk_defconfig @@ -21,7 +21,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk-portenta-x8" CONFIG_CSF_SIZE=0x2000 CONFIG_SYS_LOAD_ADDR=0x40400000 CONFIG_LTO=y @@ -94,7 +94,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_USB=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y -CONFIG_DEFAULT_FDT_FILE="imx8mm-evk.dtb" +CONFIG_DEFAULT_FDT_FILE="imx8mm-evk-portenta-x8.dtb" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 diff --git a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx_%.bbappend b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx_%.bbappend index 2339b08..a1e1e69 100644 --- a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx_%.bbappend +++ b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx_%.bbappend @@ -23,8 +23,16 @@ do_override_files_portenta_x8 () { # @TODO: inspect UBOOT_CONFIG_BASENAME for defconfig in use cp ${WORKDIR}/imx8mm_evk_defconfig ${S}/configs/imx8mm_evk_defconfig - cp ${WORKDIR}/imx8mm-evk.dts ${S}/arch/arm/dts/imx8mm-evk.dts - cp ${WORKDIR}/imx8mm-evk.dtsi ${S}/arch/arm/dts/imx8mm-evk.dtsi + # it is not possible to use this name because imx8mm-evk.dts is included + # in a different dts board and there is a duplicate node in that board + # --> changing the name + # IMPORTANT: changed the defcofig to support that + cp ${WORKDIR}/imx8mm-evk.dts ${S}/arch/arm/dts/imx8mm-evk-portenta-x8.dts + + # avoid to copy imx8mm-evk.dtsi + # This is due to the fact that imx8mm-evk.dts did include that file but + # now not anymore because it use directly imx8mm.dtsi (as per portenta-x8) + # cp ${WORKDIR}/imx8mm-evk.dtsi ${S}/arch/arm/dts/imx8mm-evk.dtsi # @TODO: u-boot auto-includes the *-u-boot.dtsi prepending MACHINE to the board devicetree # see scripts/Makefile.lib, so should never be included directly from board devicetree From 0d45298868b54ce4fb45fc6283e43c1e9f679f8c Mon Sep 17 00:00:00 2001 From: maidnl Date: Mon, 19 May 2025 10:07:25 +0200 Subject: [PATCH 2/2] Removing changes to evk-uboot dtsi --- .../portenta-x8/imx8mm-evk-u-boot.dtsi | 104 +++++++++++++----- 1 file changed, 76 insertions(+), 28 deletions(-) diff --git a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi index e1aa453..b9dd849 100644 --- a/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi +++ b/meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi @@ -39,29 +39,35 @@ }; }; -&{/soc@0} { - u-boot,dm-pre-reloc; +&aips4 { u-boot,dm-spl; }; -&A53_0 { - /delete-property/ cpu-idle-states; +®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; + u-boot,dm-spl; }; -&A53_1 { - /delete-property/ cpu-idle-states; +&pinctrl_reg_usdhc2_vmmc { + u-boot,dm-spl; }; -&A53_2 { - /delete-property/ cpu-idle-states; +&pinctrl_uart2 { + u-boot,dm-spl; }; -&A53_3 { - /delete-property/ cpu-idle-states; +&pinctrl_usdhc2_gpio { + u-boot,dm-spl; }; -&i2c2 { + +&pinctrl_usdhc2 { u-boot,dm-spl; }; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; + &gpio1 { u-boot,dm-spl; }; @@ -82,6 +88,45 @@ u-boot,dm-spl; }; +&uart2 { + u-boot,dm-spl; +}; + +&crypto { + u-boot,dm-spl; +}; + +&sec_jr0 { + u-boot,dm-spl; +}; + +&sec_jr1 { + u-boot,dm-spl; +}; + +&sec_jr2 { + u-boot,dm-spl; +}; + +&usbmisc1 { + u-boot,dm-spl; +}; + +&usbphynop1 { + u-boot,dm-spl; +}; + +&usbotg1 { + u-boot,dm-spl; +}; + +&usdhc1 { + u-boot,dm-spl; + assigned-clocks = <&clk IMX8MM_CLK_USDHC1>; + assigned-clock-rates = <400000000>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_400M>; +}; + &usdhc2 { u-boot,dm-spl; sd-uhs-sdr104; @@ -105,15 +150,14 @@ u-boot,dm-spl; }; -&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { +&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} { u-boot,dm-spl; }; -&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} { +&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} { u-boot,dm-spl; }; - &pinctrl_i2c1 { u-boot,dm-spl; }; @@ -122,27 +166,31 @@ u-boot,dm-spl; }; +&pinctrl_wdog { + u-boot,dm-spl; +}; + &fec1 { - phy-reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; - phy-reset-duration = <100>; - phy-reset-post-delay = <1>; + phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; + phy-reset-duration = <15>; + phy-reset-post-delay = <100>; }; -&wdog1 { - u-boot,dm-spl; +ðphy0 { + vddio0: vddio-regulator { + regulator-name = "VDDIO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; }; -&flexspi { - assigned-clock-rates = <100000000>; - assigned-clocks = <&clk IMX8MM_CLK_QSPI>; - assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; +&wdog1 { + u-boot,dm-spl; }; -&lcdif { - enable_polarity_low; - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; +&usbotg1 { + status = "okay"; + extcon = <&ptn5110>; }; &mipi_dsi {