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Jason2866Jason2866
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Update eth_multicast.diff
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‎patches/eth_multicast.diff

Lines changed: 109 additions & 1 deletion
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@@ -1 +1,109 @@
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diff --git a/components/esp_eth/src/esp_eth_mac_esp.c b/components/esp_eth/src/esp_eth_mac_esp.c
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index 7704d9ac48cbe572aefcacd24bfcf6097a9a0562..d59e1e33b4ab3d8a9bde7527ec8f68175bf5dc1e 100644
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--- a/components/esp_eth/src/esp_eth_mac_esp.c
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+++ b/components/esp_eth/src/esp_eth_mac_esp.c
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@@ -634,7 +634,6 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_esp32_emac_config_t *esp32_config
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emac->smi_mdio_gpio_num = esp32_config->smi_mdio_gpio_num;
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emac->flow_control_high_water_mark = FLOW_CONTROL_HIGH_WATER_MARK;
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emac->flow_control_low_water_mark = FLOW_CONTROL_LOW_WATER_MARK;
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- emac->use_apll = false;
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emac->parent.set_mediator = emac_esp32_set_mediator;
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emac->parent.init = emac_esp32_init;
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emac->parent.deinit = emac_esp32_deinit;
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diff --git a/components/esp_eth/src/esp_eth_mac_ksz8851snl.c b/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
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index 10ab357fc4c68141361e5038af1856fa769fe168..473195a83b236236a604f26f5ce1765eed2c1d91 100644
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--- a/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
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+++ b/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
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@@ -298,7 +298,7 @@ static esp_err_t init_set_defaults(emac_ksz8851snl_t *emac)
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ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXDTTR, RXDTTR_INIT_VALUE), err, TAG, "RXDTTR write failed");
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ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXDBCTR, RXDBCTR_INIT_VALUE), err, TAG, "RXDBCTR write failed");
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ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXCR1,
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- RXCR1_RXUDPFCC | RXCR1_RXTCPFCC | RXCR1_RXIPFCC | RXCR1_RXPAFMA | RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME), err, TAG, "RXCR1 write failed");
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+ RXCR1_RXUDPFCC | RXCR1_RXTCPFCC | RXCR1_RXIPFCC | RXCR1_RXPAFMA | RXCR1_RXFCE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXMAFMA | RXCR1_RXAE), err, TAG, "RXCR1 write failed");
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ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXCR2,
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(4 << RXCR2_SRDBL_SHIFT) | RXCR2_IUFFP | RXCR2_RXIUFCEZ | RXCR2_UDPLFE | RXCR2_RXICMPFCC), err, TAG, "RXCR2 write failed");
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ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXQCR, RXQCR_RXFCTE | RXQCR_ADRFE), err, TAG, "RXQCR write failed");
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@@ -650,13 +650,13 @@ static esp_err_t emac_ksz8851_set_promiscuous(esp_eth_mac_t *mac, bool enable)
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if (enable) {
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// NOTE(v.chistyakov): set promiscuous mode
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ESP_LOGD(TAG, "setting promiscuous mode");
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- rxcr1 |= RXCR1_RXINVF | RXCR1_RXAE;
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+ rxcr1 |= RXCR1_RXAE | RXCR1_RXINVF;
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rxcr1 &= ~(RXCR1_RXPAFMA | RXCR1_RXMAFMA);
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} else {
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// NOTE(v.chistyakov): set hash perfect (default)
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- ESP_LOGD(TAG, "setting hash perfect mode");
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- rxcr1 |= RXCR1_RXPAFMA;
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- rxcr1 &= ~(RXCR1_RXINVF | RXCR1_RXAE | RXCR1_RXMAFMA);
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+ ESP_LOGD(TAG, "setting perfect with multicast passed");
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+ rxcr1 |= RXCR1_RXAE| RXCR1_RXPAFMA | RXCR1_RXMAFMA;
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+ rxcr1 &= ~RXCR1_RXINVF;
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}
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ESP_GOTO_ON_ERROR(ksz8851_write_reg(emac, KSZ8851_RXCR1, rxcr1), err, TAG, "RXCR1 write failed");
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err:
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diff --git a/components/esp_eth/src/esp_eth_phy_802_3.c b/components/esp_eth/src/esp_eth_phy_802_3.c
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index 51a10fd551820bda41db581a3f65d63f63306972..785a0c0feb7725e5f9ce7174220d4df37cb14b45 100644
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--- a/components/esp_eth/src/esp_eth_phy_802_3.c
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+++ b/components/esp_eth/src/esp_eth_phy_802_3.c
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@@ -302,16 +302,18 @@ esp_err_t esp_eth_phy_802_3_detect_phy_addr(esp_eth_mediator_t *eth, int *detect
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}
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int addr_try = 0;
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uint32_t reg_value = 0;
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- for (; addr_try < 16; addr_try++) {
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- eth->phy_reg_read(eth, addr_try, ETH_PHY_IDR1_REG_ADDR, &reg_value);
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- if (reg_value != 0xFFFF && reg_value != 0x00) {
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- *detected_addr = addr_try;
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- break;
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+ for (int i = 0; i < 3; i++){
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+ for (addr_try = 0; addr_try < 32; addr_try++) {
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+ eth->phy_reg_read(eth, addr_try, ETH_PHY_IDR1_REG_ADDR, &reg_value);
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+ if (reg_value != 0xFFFF && reg_value != 0x00) {
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+ *detected_addr = addr_try;
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+ break;
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+ }
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+ }
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+ if (addr_try < 32) {
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+ ESP_LOGD(TAG, "Found PHY address: %d", addr_try);
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+ return ESP_OK;
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}
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- }
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- if (addr_try < 16) {
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- ESP_LOGD(TAG, "Found PHY address: %d", addr_try);
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- return ESP_OK;
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}
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ESP_LOGE(TAG, "No PHY device detected");
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return ESP_ERR_NOT_FOUND;
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diff --git a/components/esp_eth/src/esp_eth_phy_dm9051.c b/components/esp_eth/src/esp_eth_phy_dm9051.c
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index d8f9bad9fc8a4da396f65c47f283335bf5448b2f..6db49f8fad0adacf78c52e78525b856bfb53b643 100644
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--- a/components/esp_eth/src/esp_eth_phy_dm9051.c
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+++ b/components/esp_eth/src/esp_eth_phy_dm9051.c
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@@ -95,7 +95,7 @@ static esp_err_t dm9051_update_link_duplex_speed(phy_dm9051_t *dm9051)
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eth_duplex_t duplex = ETH_DUPLEX_HALF;
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uint32_t peer_pause_ability = false;
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bmsr_reg_t bmsr;
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- dscsr_reg_t dscsr;
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+ bmcr_reg_t bmcr;
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anlpar_reg_t anlpar;
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// BMSR is a latch low register
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// after power up, the first latched value must be 0, which means down
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@@ -108,17 +108,9 @@ static esp_err_t dm9051_update_link_duplex_speed(phy_dm9051_t *dm9051)
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if (dm9051->phy_802_3.link_status != link) {
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/* when link up, read negotiation result */
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if (link == ETH_LINK_UP) {
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- ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_DSCSR_REG_ADDR, &(dscsr.val)), err, TAG, "read DSCSR failed");
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- if (dscsr.fdx100 || dscsr.hdx100) {
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- speed = ETH_SPEED_100M;
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- } else {
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- speed = ETH_SPEED_10M;
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- }
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- if (dscsr.fdx100 || dscsr.fdx10) {
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- duplex = ETH_DUPLEX_FULL;
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- } else {
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- duplex = ETH_DUPLEX_HALF;
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- }
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+ ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
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+ speed = bmcr.speed_select == 1 ? ETH_SPEED_100M : ETH_SPEED_10M;
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+ duplex = bmcr.duplex_mode == 1 ? ETH_DUPLEX_FULL : ETH_DUPLEX_HALF;
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ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_SPEED, (void *)speed), err, TAG, "change speed failed");
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ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_DUPLEX, (void *)duplex), err, TAG, "change duplex failed");
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/* if we're in duplex mode, and peer has the flow control ability */

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