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Jason2866Jason2866
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Update esp32s2_i2c_ll_master_init.diff
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‎patches/esp32s2_i2c_ll_master_init.diff

Lines changed: 17 additions & 109 deletions
Original file line numberDiff line numberDiff line change
@@ -1,109 +1,17 @@
1-
diff --git a/components/esp_eth/src/esp_eth_mac_esp.c b/components/esp_eth/src/esp_eth_mac_esp.c
2-
index 7704d9ac48cbe572aefcacd24bfcf6097a9a0562..d59e1e33b4ab3d8a9bde7527ec8f68175bf5dc1e 100644
3-
--- a/components/esp_eth/src/esp_eth_mac_esp.c
4-
+++ b/components/esp_eth/src/esp_eth_mac_esp.c
5-
@@ -634,7 +634,6 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_esp32_emac_config_t *esp32_config
6-
emac->smi_mdio_gpio_num = esp32_config->smi_mdio_gpio_num;
7-
emac->flow_control_high_water_mark = FLOW_CONTROL_HIGH_WATER_MARK;
8-
emac->flow_control_low_water_mark = FLOW_CONTROL_LOW_WATER_MARK;
9-
- emac->use_apll = false;
10-
emac->parent.set_mediator = emac_esp32_set_mediator;
11-
emac->parent.init = emac_esp32_init;
12-
emac->parent.deinit = emac_esp32_deinit;
13-
diff --git a/components/esp_eth/src/esp_eth_mac_ksz8851snl.c b/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
14-
index 10ab357fc4c68141361e5038af1856fa769fe168..473195a83b236236a604f26f5ce1765eed2c1d91 100644
15-
--- a/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
16-
+++ b/components/esp_eth/src/esp_eth_mac_ksz8851snl.c
17-
@@ -298,7 +298,7 @@ static esp_err_t init_set_defaults(emac_ksz8851snl_t *emac)
18-
ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXDTTR, RXDTTR_INIT_VALUE), err, TAG, "RXDTTR write failed");
19-
ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXDBCTR, RXDBCTR_INIT_VALUE), err, TAG, "RXDBCTR write failed");
20-
ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXCR1,
21-
- RXCR1_RXUDPFCC | RXCR1_RXTCPFCC | RXCR1_RXIPFCC | RXCR1_RXPAFMA | RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME), err, TAG, "RXCR1 write failed");
22-
+ RXCR1_RXUDPFCC | RXCR1_RXTCPFCC | RXCR1_RXIPFCC | RXCR1_RXPAFMA | RXCR1_RXFCE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXMAFMA | RXCR1_RXAE), err, TAG, "RXCR1 write failed");
23-
ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXCR2,
24-
(4 << RXCR2_SRDBL_SHIFT) | RXCR2_IUFFP | RXCR2_RXIUFCEZ | RXCR2_UDPLFE | RXCR2_RXICMPFCC), err, TAG, "RXCR2 write failed");
25-
ESP_GOTO_ON_ERROR(ksz8851_set_bits(emac, KSZ8851_RXQCR, RXQCR_RXFCTE | RXQCR_ADRFE), err, TAG, "RXQCR write failed");
26-
@@ -650,13 +650,13 @@ static esp_err_t emac_ksz8851_set_promiscuous(esp_eth_mac_t *mac, bool enable)
27-
if (enable) {
28-
// NOTE(v.chistyakov): set promiscuous mode
29-
ESP_LOGD(TAG, "setting promiscuous mode");
30-
- rxcr1 |= RXCR1_RXINVF | RXCR1_RXAE;
31-
+ rxcr1 |= RXCR1_RXAE | RXCR1_RXINVF;
32-
rxcr1 &= ~(RXCR1_RXPAFMA | RXCR1_RXMAFMA);
33-
} else {
34-
// NOTE(v.chistyakov): set hash perfect (default)
35-
- ESP_LOGD(TAG, "setting hash perfect mode");
36-
- rxcr1 |= RXCR1_RXPAFMA;
37-
- rxcr1 &= ~(RXCR1_RXINVF | RXCR1_RXAE | RXCR1_RXMAFMA);
38-
+ ESP_LOGD(TAG, "setting perfect with multicast passed");
39-
+ rxcr1 |= RXCR1_RXAE| RXCR1_RXPAFMA | RXCR1_RXMAFMA;
40-
+ rxcr1 &= ~RXCR1_RXINVF;
41-
}
42-
ESP_GOTO_ON_ERROR(ksz8851_write_reg(emac, KSZ8851_RXCR1, rxcr1), err, TAG, "RXCR1 write failed");
43-
err:
44-
diff --git a/components/esp_eth/src/esp_eth_phy_802_3.c b/components/esp_eth/src/esp_eth_phy_802_3.c
45-
index 51a10fd551820bda41db581a3f65d63f63306972..785a0c0feb7725e5f9ce7174220d4df37cb14b45 100644
46-
--- a/components/esp_eth/src/esp_eth_phy_802_3.c
47-
+++ b/components/esp_eth/src/esp_eth_phy_802_3.c
48-
@@ -302,16 +302,18 @@ esp_err_t esp_eth_phy_802_3_detect_phy_addr(esp_eth_mediator_t *eth, int *detect
49-
}
50-
int addr_try = 0;
51-
uint32_t reg_value = 0;
52-
- for (; addr_try < 16; addr_try++) {
53-
- eth->phy_reg_read(eth, addr_try, ETH_PHY_IDR1_REG_ADDR, &reg_value);
54-
- if (reg_value != 0xFFFF && reg_value != 0x00) {
55-
- *detected_addr = addr_try;
56-
- break;
57-
+ for (int i = 0; i < 3; i++){
58-
+ for (addr_try = 0; addr_try < 32; addr_try++) {
59-
+ eth->phy_reg_read(eth, addr_try, ETH_PHY_IDR1_REG_ADDR, &reg_value);
60-
+ if (reg_value != 0xFFFF && reg_value != 0x00) {
61-
+ *detected_addr = addr_try;
62-
+ break;
63-
+ }
64-
+ }
65-
+ if (addr_try < 32) {
66-
+ ESP_LOGD(TAG, "Found PHY address: %d", addr_try);
67-
+ return ESP_OK;
68-
}
69-
- }
70-
- if (addr_try < 16) {
71-
- ESP_LOGD(TAG, "Found PHY address: %d", addr_try);
72-
- return ESP_OK;
73-
}
74-
ESP_LOGE(TAG, "No PHY device detected");
75-
return ESP_ERR_NOT_FOUND;
76-
diff --git a/components/esp_eth/src/esp_eth_phy_dm9051.c b/components/esp_eth/src/esp_eth_phy_dm9051.c
77-
index d8f9bad9fc8a4da396f65c47f283335bf5448b2f..6db49f8fad0adacf78c52e78525b856bfb53b643 100644
78-
--- a/components/esp_eth/src/esp_eth_phy_dm9051.c
79-
+++ b/components/esp_eth/src/esp_eth_phy_dm9051.c
80-
@@ -95,7 +95,7 @@ static esp_err_t dm9051_update_link_duplex_speed(phy_dm9051_t *dm9051)
81-
eth_duplex_t duplex = ETH_DUPLEX_HALF;
82-
uint32_t peer_pause_ability = false;
83-
bmsr_reg_t bmsr;
84-
- dscsr_reg_t dscsr;
85-
+ bmcr_reg_t bmcr;
86-
anlpar_reg_t anlpar;
87-
// BMSR is a latch low register
88-
// after power up, the first latched value must be 0, which means down
89-
@@ -108,17 +108,9 @@ static esp_err_t dm9051_update_link_duplex_speed(phy_dm9051_t *dm9051)
90-
if (dm9051->phy_802_3.link_status != link) {
91-
/* when link up, read negotiation result */
92-
if (link == ETH_LINK_UP) {
93-
- ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_DSCSR_REG_ADDR, &(dscsr.val)), err, TAG, "read DSCSR failed");
94-
- if (dscsr.fdx100 || dscsr.hdx100) {
95-
- speed = ETH_SPEED_100M;
96-
- } else {
97-
- speed = ETH_SPEED_10M;
98-
- }
99-
- if (dscsr.fdx100 || dscsr.fdx10) {
100-
- duplex = ETH_DUPLEX_FULL;
101-
- } else {
102-
- duplex = ETH_DUPLEX_HALF;
103-
- }
104-
+ ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
105-
+ speed = bmcr.speed_select == 1 ? ETH_SPEED_100M : ETH_SPEED_10M;
106-
+ duplex = bmcr.duplex_mode == 1 ? ETH_DUPLEX_FULL : ETH_DUPLEX_HALF;
107-
ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_SPEED, (void *)speed), err, TAG, "change speed failed");
108-
ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_DUPLEX, (void *)duplex), err, TAG, "change duplex failed");
109-
/* if we're in duplex mode, and peer has the flow control ability */
1+
diff --git a/components/hal/esp32s2/include/hal/i2c_ll.h b/components/hal/esp32s2/include/hal/i2c_ll.h
2+
index f9a66b61d6..2f669b68c0 100644
3+
--- a/components/hal/esp32s2/include/hal/i2c_ll.h
4+
+++ b/components/hal/esp32s2/include/hal/i2c_ll.h
5+
@@ -653,10 +653,12 @@ static inline void i2c_ll_enable_controller_clock(i2c_dev_t *hw, bool en)
6+
static inline void i2c_ll_master_init(i2c_dev_t *hw)
7+
{
8+
typeof(hw->ctr) ctrl_reg;
9+
+ uint32_t ref_always_on = hw->ctr.ref_always_on;
10+
ctrl_reg.val = 0;
11+
ctrl_reg.ms_mode = 1;
12+
ctrl_reg.sda_force_out = 1;
13+
ctrl_reg.scl_force_out = 1;
14+
+ ctrl_reg.ref_always_on = ref_always_on;
15+
hw->ctr.val = ctrl_reg.val;
16+
}
17+

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