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#define UART_REG_BASE (u ) ((u==0)?DR_REG_UART_BASE:( (u==1)?DR_REG_UART1_BASE:( (u==2)?DR_REG_UART2_BASE:0)))
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#define UART_RXD_IDX (u ) ((u==0)?U0RXD_IN_IDX:( (u==1)?U1RXD_IN_IDX:( (u==2)?U2RXD_IN_IDX:0)))
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#define UART_TXD_IDX (u ) ((u==0)?U0TXD_OUT_IDX:( (u==1)?U1TXD_OUT_IDX:( (u==2)?U2TXD_OUT_IDX:0)))
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+ #define UART_INTR_SOURCE (u ) ((u==0)?ETS_UART0_INTR_SOURCE:( (u==1)?ETS_UART1_INTR_SOURCE:((u==2)?ETS_UART2_INTR_SOURCE:0)))
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static int s_uart_debug_nr = 0 ;
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struct uart_struct_t {
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- uart_dev_t * dev ;
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+ uart_dev_t * dev ;
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#if !CONFIG_DISABLE_HAL_LOCKS
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xSemaphoreHandle lock ;
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#endif
@@ -119,7 +120,7 @@ static void IRAM_ATTR _uart_isr()
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// No user function is present, handle as you normally would
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xQueueSendFromISR (uart -> queue , & c , & xHigherPriorityTaskWoken );
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}
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- }
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+ }
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}
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if (xHigherPriorityTaskWoken ) {
@@ -369,9 +370,9 @@ uint32_t uartAvailableForWrite(uart_t* uart)
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}
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void uartRxFifoToQueue (uart_t * uart )
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- {
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+ {
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uint8_t c ;
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- UART_MUTEX_LOCK ();
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+ UART_MUTEX_LOCK ();
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//disable interrupts
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uart -> dev -> int_ena .val = 0 ;
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uart -> dev -> int_clr .val = 0xffffffff ;
@@ -384,6 +385,7 @@ void uartRxFifoToQueue(uart_t* uart)
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uart -> dev -> int_ena .frm_err = 1 ;
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uart -> dev -> int_ena .rxfifo_tout = 1 ;
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uart -> dev -> int_clr .val = 0xffffffff ;
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+ UART_MUTEX_UNLOCK ();
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}
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uint8_t uartRead (uart_t * uart )
@@ -394,7 +396,7 @@ uint8_t uartRead(uart_t* uart)
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uint8_t c ;
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if ((uxQueueMessagesWaiting (uart -> queue ) == 0 ) && (uart -> dev -> status .rxfifo_cnt > 0 ))
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{
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- uartRxFifoToQueue (uart );
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+ uartRxFifoToQueue (uart );
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}
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if (xQueueReceive (uart -> queue , & c , 0 )) {
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return c ;
@@ -410,7 +412,7 @@ uint8_t uartPeek(uart_t* uart)
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uint8_t c ;
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if ((uxQueueMessagesWaiting (uart -> queue ) == 0 ) && (uart -> dev -> status .rxfifo_cnt > 0 ))
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{
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- uartRxFifoToQueue (uart );
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+ uartRxFifoToQueue (uart );
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}
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if (xQueuePeek (uart -> queue , & c , 0 )) {
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return c ;
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