Merge pull request #11 from espressif/master

17042021

Author: Jason2866

build.sh

@@ -20,7 +20,7 @@ if [ $? -ne 0 ]; then exit 1; fi
 source ./tools/install-esp-idf.sh
 if [ $? -ne 0 ]; then exit 1; fi
 
-TARGETS="esp32s2 esp32"
+TARGETS="esp32c3 esp32s2 esp32"
 
 echo $(git -C $AR_COMPS/arduino describe --all --long) > version.txt
 

components/arduino_tinyusb/src/dcd_esp32s2.c

@@ -27,6 +27,7 @@
  */
 
 #include "tusb_option.h"
+#include "common/tusb_fifo.h"
 
 #if CFG_TUSB_MCU == OPT_MCU_ESP32S2 && TUSB_OPT_DEVICE_ENABLED
 
@@ -59,6 +60,7 @@
 
 typedef struct {
     uint8_t *buffer;
+    // tu_fifo_t * ff; // TODO support dcd_edpt_xfer_fifo API
     uint16_t total_len;
     uint16_t queued_len;
     uint16_t max_size;
@@ -371,6 +373,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
 
   xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir);
   xfer->buffer       = buffer;
+  // xfer->ff           = NULL; // TODO support dcd_edpt_xfer_fifo API
   xfer->total_len    = total_bytes;
   xfer->queued_len   = 0;
   xfer->short_packet = false;
@@ -406,6 +409,56 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
   return true;
 }
 
+#if 0 // TODO support dcd_edpt_xfer_fifo API
+bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
+{
+  (void)rhport;
+
+  // USB buffers always work in bytes so to avoid unnecessary divisions we demand item_size = 1
+  TU_ASSERT(ff->item_size == 1);
+
+  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
+
+  xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir);
+  xfer->buffer       = NULL;
+  xfer->ff           = ff;
+  xfer->total_len    = total_bytes;
+  xfer->queued_len   = 0;
+  xfer->short_packet = false;
+
+  uint16_t num_packets = (total_bytes / xfer->max_size);
+  uint8_t short_packet_size = total_bytes % xfer->max_size;
+
+  // Zero-size packet is special case.
+  if (short_packet_size > 0 || (total_bytes == 0)) {
+    num_packets++;
+  }
+
+  ESP_LOGV(TAG, "Transfer <-> EP%i, %s, pkgs: %i, bytes: %i",
+           epnum, ((dir == TUSB_DIR_IN) ? "USB0.HOST (in)" : "HOST->DEV (out)"),
+           num_packets, total_bytes);
+
+  // IN and OUT endpoint xfers are interrupt-driven, we just schedule them
+  // here.
+  if (dir == TUSB_DIR_IN) {
+    // A full IN transfer (multiple packets, possibly) triggers XFRC.
+    USB0.in_ep_reg[epnum].dieptsiz = (num_packets << USB_D_PKTCNT0_S) | total_bytes;
+    USB0.in_ep_reg[epnum].diepctl |= USB_D_EPENA1_M | USB_D_CNAK1_M; // Enable | CNAK
+
+    // Enable fifo empty interrupt only if there are something to put in the fifo.
+    if(total_bytes != 0) {
+      USB0.dtknqr4_fifoemptymsk |= (1 << epnum);
+    }
+  } else {
+    // Each complete packet for OUT xfers triggers XFRC.
+    USB0.out_ep_reg[epnum].doeptsiz |= USB_PKTCNT0_M | ((xfer->max_size & USB_XFERSIZE0_V) << USB_XFERSIZE0_S);
+    USB0.out_ep_reg[epnum].doepctl  |= USB_EPENA0_M | USB_CNAK0_M;
+  }
+  return true;
+}
+#endif
+
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
@@ -514,35 +567,46 @@ static void receive_packet(xfer_ctl_t *xfer, /* usb_out_endpoint_t * out_ep, */
     to_recv_size = (xfer_size > xfer->max_size) ? xfer->max_size : xfer_size;
   }
 
-  uint8_t to_recv_rem = to_recv_size % 4;
-  uint16_t to_recv_size_aligned = to_recv_size - to_recv_rem;
-
-  // Do not assume xfer buffer is aligned.
-  uint8_t *base = (xfer->buffer + xfer->queued_len);
-
-  // This for loop always runs at least once- skip if less than 4 bytes
-  // to collect.
-  if (to_recv_size >= 4) {
-    for (uint16_t i = 0; i < to_recv_size_aligned; i += 4) {
-      uint32_t tmp = (*rx_fifo);
-      base[i] = tmp & 0x000000FF;
-      base[i + 1] = (tmp & 0x0000FF00) >> 8;
-      base[i + 2] = (tmp & 0x00FF0000) >> 16;
-      base[i + 3] = (tmp & 0xFF000000) >> 24;
-    }
+  // Common buffer read
+#if 0 // TODO support dcd_edpt_xfer_fifo API
+  if (xfer->ff)
+  {
+    // Ring buffer
+    tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void *) rx_fifo, to_recv_size);
   }
+  else
+#endif
+  {
+    uint8_t to_recv_rem = to_recv_size % 4;
+    uint16_t to_recv_size_aligned = to_recv_size - to_recv_rem;
+
+    // Do not assume xfer buffer is aligned.
+    uint8_t *base = (xfer->buffer + xfer->queued_len);
+
+    // This for loop always runs at least once- skip if less than 4 bytes
+    // to collect.
+    if (to_recv_size >= 4) {
+      for (uint16_t i = 0; i < to_recv_size_aligned; i += 4) {
+        uint32_t tmp = (*rx_fifo);
+        base[i] = tmp & 0x000000FF;
+        base[i + 1] = (tmp & 0x0000FF00) >> 8;
+        base[i + 2] = (tmp & 0x00FF0000) >> 16;
+        base[i + 3] = (tmp & 0xFF000000) >> 24;
+      }
+    }
 
-  // Do not read invalid bytes from RX FIFO.
-  if (to_recv_rem != 0) {
-    uint32_t tmp = (*rx_fifo);
-    uint8_t *last_32b_bound = base + to_recv_size_aligned;
+    // Do not read invalid bytes from RX FIFO.
+    if (to_recv_rem != 0) {
+      uint32_t tmp = (*rx_fifo);
+      uint8_t *last_32b_bound = base + to_recv_size_aligned;
 
-    last_32b_bound[0] = tmp & 0x000000FF;
-    if (to_recv_rem > 1) {
-      last_32b_bound[1] = (tmp & 0x0000FF00) >> 8;
-    }
-    if (to_recv_rem > 2) {
-      last_32b_bound[2] = (tmp & 0x00FF0000) >> 16;
+      last_32b_bound[0] = tmp & 0x000000FF;
+      if (to_recv_rem > 1) {
+        last_32b_bound[1] = (tmp & 0x0000FF00) >> 8;
+      }
+      if (to_recv_rem > 2) {
+        last_32b_bound[2] = (tmp & 0x00FF0000) >> 16;
+      }
     }
   }
 
@@ -562,37 +626,47 @@ static void transmit_packet(xfer_ctl_t *xfer, volatile usb_in_endpoint_t *in_ep,
   xfer->queued_len = xfer->total_len - remaining;
 
   uint16_t to_xfer_size = (remaining > xfer->max_size) ? xfer->max_size : remaining;
-  uint8_t to_xfer_rem = to_xfer_size % 4;
-  uint16_t to_xfer_size_aligned = to_xfer_size - to_xfer_rem;
-
-  // Buffer might not be aligned to 32b, so we need to force alignment
-  // by copying to a temp var.
-  uint8_t *base = (xfer->buffer + xfer->queued_len);
-
-  // This for loop always runs at least once- skip if less than 4 bytes
-  // to send off.
-  if (to_xfer_size >= 4) {
-    for (uint16_t i = 0; i < to_xfer_size_aligned; i += 4) {
-      uint32_t tmp = base[i] | (base[i + 1] << 8) |
-          (base[i + 2] << 16) | (base[i + 3] << 24);
-      (*tx_fifo) = tmp;
-    }
+
+#if 0 // TODO support dcd_edpt_xfer_fifo API
+  if (xfer->ff)
+  {
+    tu_fifo_read_n_const_addr_full_words(xfer->ff, (void *) tx_fifo, to_xfer_size);
   }
+  else
+#endif
+  {
+    uint8_t to_xfer_rem = to_xfer_size % 4;
+    uint16_t to_xfer_size_aligned = to_xfer_size - to_xfer_rem;
+
+    // Buffer might not be aligned to 32b, so we need to force alignment
+    // by copying to a temp var.
+    uint8_t *base = (xfer->buffer + xfer->queued_len);
+
+    // This for loop always runs at least once- skip if less than 4 bytes
+    // to send off.
+    if (to_xfer_size >= 4) {
+      for (uint16_t i = 0; i < to_xfer_size_aligned; i += 4) {
+        uint32_t tmp = base[i] | (base[i + 1] << 8) |
+            (base[i + 2] << 16) | (base[i + 3] << 24);
+        (*tx_fifo) = tmp;
+      }
+    }
 
-  // Do not read beyond end of buffer if not divisible by 4.
-  if (to_xfer_rem != 0) {
-    uint32_t tmp = 0;
-    uint8_t *last_32b_bound = base + to_xfer_size_aligned;
+    // Do not read beyond end of buffer if not divisible by 4.
+    if (to_xfer_rem != 0) {
+      uint32_t tmp = 0;
+      uint8_t *last_32b_bound = base + to_xfer_size_aligned;
 
-    tmp |= last_32b_bound[0];
-    if (to_xfer_rem > 1) {
-      tmp |= (last_32b_bound[1] << 8);
-    }
-    if (to_xfer_rem > 2) {
-      tmp |= (last_32b_bound[2] << 16);
-    }
+      tmp |= last_32b_bound[0];
+      if (to_xfer_rem > 1) {
+        tmp |= (last_32b_bound[1] << 8);
+      }
+      if (to_xfer_rem > 2) {
+        tmp |= (last_32b_bound[2] << 16);
+      }
 
-    (*tx_fifo) = tmp;
+      (*tx_fifo) = tmp;
+    }
   }
 }
 

components/fb_gfx/fb_gfx.c

@@ -108,7 +108,7 @@ uint8_t fb_gfx_putc(fb_data_t *fb, int32_t x, int32_t y, uint32_t color, unsigne
     return xa;
 }
 
-uint32_t fb_gfx_print(fb_data_t *fb, int x, int y, uint32_t color, const char * str)
+uint32_t fb_gfx_print(fb_data_t *fb, int32_t x, int32_t y, uint32_t color, const char * str)
 {
     uint32_t l = 0;
     int xc = x, yc = y, lc = fb->width - gfxFont->glyph[0].xAdvance;

sdkconfig.esp32

@@ -553,9 +553,6 @@ CONFIG_SPIRAM_SPIWP_SD3_PIN=7
 
 # CONFIG_ESP32_TRAX is not set
 CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
-# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
-CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
-CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
 CONFIG_ESP32_ULP_COPROC_ENABLED=y
 CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=512
 CONFIG_ESP32_DEBUG_OCDAWARE=y
@@ -569,7 +566,6 @@ CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 is not set
 # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_ESP32_BROWNOUT_DET_LVL=0
-CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
 CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
 # CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set
 # CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set
@@ -678,7 +674,15 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y
 CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y
 CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y
 CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y
+# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set
+CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y
+CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
 # end of MAC Config
+
+#
+# Sleep Config
+#
+# end of Sleep Config
 # end of Hardware Settings
 
 #
@@ -785,6 +789,7 @@ CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y
 # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set
 CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
 CONFIG_ESP32_PHY_MAX_TX_POWER=20
+CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
 # end of PHY
 
 #
@@ -1035,6 +1040,7 @@ CONFIG_LWIP_PPP_PAP_SUPPORT=y
 CONFIG_LWIP_PPP_CHAP_SUPPORT=y
 CONFIG_LWIP_PPP_MSCHAP_SUPPORT=y
 CONFIG_LWIP_PPP_MPPE_SUPPORT=y
+# CONFIG_LWIP_ENABLE_LCP_ECHO is not set
 # CONFIG_LWIP_PPP_DEBUG_ON is not set
 # CONFIG_LWIP_SLIP_SUPPORT is not set
 
@@ -1058,13 +1064,6 @@ CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
 CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000
 # end of SNTP
 
-#
-# LCP
-#
-CONFIG_LCP_ECHOINTERVAL=0
-CONFIG_LCP_MAXECHOFAILS=3
-# end of LCP
-
 CONFIG_LWIP_ESP_LWIP_ASSERT=y
 
 #
@@ -1081,22 +1080,7 @@ CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y
 # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set
 # end of Hooks
 
-#
-# Debug
-#
-# CONFIG_LWIP_NETIF_DEBUG is not set
-# CONFIG_LWIP_PBUF_DEBUG is not set
-# CONFIG_LWIP_ETHARP_DEBUG is not set
-# CONFIG_LWIP_API_LIB_DEBUG is not set
-# CONFIG_LWIP_SOCKETS_DEBUG is not set
-# CONFIG_LWIP_IP_DEBUG is not set
-# CONFIG_LWIP_ICMP_DEBUG is not set
-# CONFIG_LWIP_DHCP_STATE_DEBUG is not set
-# CONFIG_LWIP_DHCP_DEBUG is not set
-# CONFIG_LWIP_IP6_DEBUG is not set
-# CONFIG_LWIP_ICMP6_DEBUG is not set
-# CONFIG_LWIP_TCP_DEBUG is not set
-# end of Debug
+# CONFIG_LWIP_DEBUG is not set
 # end of LWIP
 
 #
@@ -1229,6 +1213,7 @@ CONFIG_MDNS_TASK_AFFINITY_CPU0=y
 # CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set
 CONFIG_MDNS_TASK_AFFINITY=0x0
 CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000
+# CONFIG_MDNS_STRICT_MODE is not set
 CONFIG_MDNS_TIMER_PERIOD_MS=100
 # end of mDNS
 
@@ -1273,6 +1258,12 @@ CONFIG_OPENSSL_ASSERT_DO_NOTHING=y
 # CONFIG_OPENSSL_ASSERT_EXIT is not set
 # end of OpenSSL
 
+#
+# OpenThread
+#
+# CONFIG_OPENTHREAD_ENABLED is not set
+# end of OpenThread
+
 #
 # PThreads
 #
@@ -1609,9 +1600,6 @@ CONFIG_ADC2_DISABLE_DAC=y
 CONFIG_SPIRAM_SUPPORT=y
 # CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST is not set
 CONFIG_TRACEMEM_RESERVE_DRAM=0x0
-# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set
-CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y
-CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4
 CONFIG_ULP_COPROC_ENABLED=y
 CONFIG_ULP_COPROC_RESERVE_MEM=512
 CONFIG_BROWNOUT_DET=y
@@ -1624,7 +1612,6 @@ CONFIG_BROWNOUT_DET_LVL_SEL_0=y
 # CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set
 # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set
 CONFIG_BROWNOUT_DET_LVL=0
-CONFIG_REDUCE_PHY_TX_POWER=y
 CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
 # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set
 # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set
@@ -1634,6 +1621,9 @@ CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
 # CONFIG_EVENT_LOOP_PROFILING is not set
 CONFIG_POST_EVENTS_FROM_ISR=y
 CONFIG_POST_EVENTS_FROM_IRAM_ISR=y
+# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set
+CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y
+CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4
 # CONFIG_ESP32S2_PANIC_PRINT_HALT is not set
 CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y
 # CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set
@@ -1658,6 +1648,7 @@ CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
 CONFIG_IPC_TASK_STACK_SIZE=1024
 CONFIG_TIMER_TASK_STACK_SIZE=4096
 CONFIG_SW_COEXIST_ENABLE=y
+CONFIG_REDUCE_PHY_TX_POWER=y
 # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
 # CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
 CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y