@@ -28,8 +28,8 @@ dma_subsys: bus@5a000000 {
28
28
#size-cells = <0>;
29
29
interrupts = <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>;
30
30
interrupt-parent = <&gic>;
31
- clocks = <&spi0_lpcg 0 >,
32
- <&spi0_lpcg 1 >;
31
+ clocks = <&spi0_lpcg IMX_LPCG_CLK_0 >,
32
+ <&spi0_lpcg IMX_LPCG_CLK_4 >;
33
33
clock-names = "per", "ipg";
34
34
assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
35
35
assigned-clock-rates = <60000000>;
@@ -44,8 +44,8 @@ dma_subsys: bus@5a000000 {
44
44
#size-cells = <0>;
45
45
interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
46
46
interrupt-parent = <&gic>;
47
- clocks = <&spi1_lpcg 0 >,
48
- <&spi1_lpcg 1 >;
47
+ clocks = <&spi1_lpcg IMX_LPCG_CLK_0 >,
48
+ <&spi1_lpcg IMX_LPCG_CLK_4 >;
49
49
clock-names = "per", "ipg";
50
50
assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
51
51
assigned-clock-rates = <60000000>;
@@ -60,8 +60,8 @@ dma_subsys: bus@5a000000 {
60
60
#size-cells = <0>;
61
61
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
62
62
interrupt-parent = <&gic>;
63
- clocks = <&spi2_lpcg 0 >,
64
- <&spi2_lpcg 1 >;
63
+ clocks = <&spi2_lpcg IMX_LPCG_CLK_0 >,
64
+ <&spi2_lpcg IMX_LPCG_CLK_4 >;
65
65
clock-names = "per", "ipg";
66
66
assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
67
67
assigned-clock-rates = <60000000>;
@@ -76,8 +76,8 @@ dma_subsys: bus@5a000000 {
76
76
#size-cells = <0>;
77
77
interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
78
78
interrupt-parent = <&gic>;
79
- clocks = <&spi3_lpcg 0 >,
80
- <&spi3_lpcg 1 >;
79
+ clocks = <&spi3_lpcg IMX_LPCG_CLK_0 >,
80
+ <&spi3_lpcg IMX_LPCG_CLK_4 >;
81
81
clock-names = "per", "ipg";
82
82
assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
83
83
assigned-clock-rates = <60000000>;
0 commit comments