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MIPS: Remove TX39XX support
No (active) developer owns this hardware, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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‎arch/mips/Kbuild.platforms

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@@ -32,7 +32,6 @@ platform-$(CONFIG_SIBYTE_SB1250) += sibyte/
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platform-$(CONFIG_SIBYTE_BCM1x55) += sibyte/
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platform-$(CONFIG_SIBYTE_BCM1x80) += sibyte/
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platform-$(CONFIG_SNI_RM) += sni/
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platform-$(CONFIG_MACH_TX39XX) += txx9/
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platform-$(CONFIG_MACH_TX49XX) += txx9/
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platform-$(CONFIG_MACH_VR41XX) += vr41xx/
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‎arch/mips/Kconfig

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@@ -927,9 +927,6 @@ config SNI_RM
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Technology and now in turn merged with Fujitsu. Say Y here to
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support this machine type.
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config MACH_TX39XX
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bool "Toshiba TX39 series based machines"
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config MACH_TX49XX
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bool "Toshiba TX49 series based machines"
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select WAR_TX49XX_ICACHE_INDEX_INV
@@ -1584,12 +1581,6 @@ config CPU_R3000
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might be a safe bet. If the resulting kernel does not work,
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try to recompile with R3000.
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1587-
config CPU_TX39XX
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bool "R39XX"
1589-
depends on SYS_HAS_CPU_TX39XX
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select CPU_SUPPORTS_32BIT_KERNEL
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select CPU_R3K_TLB
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config CPU_VR41XX
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bool "R41xx"
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depends on SYS_HAS_CPU_VR41XX
@@ -1916,9 +1907,6 @@ config SYS_HAS_CPU_P5600
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config SYS_HAS_CPU_R3000
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bool
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config SYS_HAS_CPU_TX39XX
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bool
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config SYS_HAS_CPU_VR41XX
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bool
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@@ -2149,7 +2137,7 @@ config PAGE_SIZE_8KB
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config PAGE_SIZE_16KB
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bool "16kB"
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depends on !CPU_R3000 && !CPU_TX39XX
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depends on !CPU_R3000
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help
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Using 16kB page size will result in higher performance kernel at
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the price of higher memory consumption. This option is available on
@@ -2168,7 +2156,7 @@ config PAGE_SIZE_32KB
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config PAGE_SIZE_64KB
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bool "64kB"
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depends on !CPU_R3000 && !CPU_TX39XX
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depends on !CPU_R3000
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help
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Using 64kB page size will result in higher performance kernel at
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the price of higher memory consumption. This option is available on
@@ -2236,7 +2224,7 @@ config CPU_HAS_PREFETCH
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config CPU_GENERIC_DUMP_TLB
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bool
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default y if !(CPU_R3000 || CPU_TX39XX)
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default y if !CPU_R3000
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config MIPS_FP_SUPPORT
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bool "Floating Point support" if EXPERT
@@ -2256,7 +2244,7 @@ config MIPS_FP_SUPPORT
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config CPU_R2300_FPU
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bool
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depends on MIPS_FP_SUPPORT
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default y if CPU_R3000 || CPU_TX39XX
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default y if CPU_R3000
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config CPU_R3K_TLB
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bool
@@ -2575,13 +2563,13 @@ config CPU_R4X00_BUGS64
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config MIPS_ASID_SHIFT
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int
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default 6 if CPU_R3000 || CPU_TX39XX
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default 6 if CPU_R3000
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default 0
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config MIPS_ASID_BITS
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int
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default 0 if MIPS_ASID_BITS_VARIABLE
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default 6 if CPU_R3000 || CPU_TX39XX
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default 6 if CPU_R3000
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default 8
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config MIPS_ASID_BITS_VARIABLE

‎arch/mips/Makefile

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@@ -158,7 +158,6 @@ cflags-y += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
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# CPU-dependent compiler/assembler options for optimization.
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#
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cflags-$(CONFIG_CPU_R3000) += -march=r3000
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cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
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cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap
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cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
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cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap

‎arch/mips/configs/jmr3927_defconfig

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‎arch/mips/include/asm/cpu-features.h

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@@ -120,9 +120,6 @@
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#ifndef cpu_has_4k_cache
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#define cpu_has_4k_cache __isa_ge_or_opt(1, MIPS_CPU_4K_CACHE)
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#endif
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#ifndef cpu_has_tx39_cache
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#define cpu_has_tx39_cache __opt(MIPS_CPU_TX39_CACHE)
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#endif
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#ifndef cpu_has_octeon_cache
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#define cpu_has_octeon_cache 0
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#endif

‎arch/mips/include/asm/cpu-type.h

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@@ -105,12 +105,6 @@ static inline int __pure __get_cpu_type(const int cpu_type)
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case CPU_R3081E:
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#endif
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#ifdef CONFIG_SYS_HAS_CPU_TX39XX
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case CPU_TX3912:
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case CPU_TX3922:
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case CPU_TX3927:
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#endif
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#ifdef CONFIG_SYS_HAS_CPU_VR41XX
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case CPU_VR41XX:
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case CPU_VR4111:

‎arch/mips/include/asm/cpu.h

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@@ -309,11 +309,6 @@ enum cpu_type_enum {
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CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000,
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CPU_SR71000, CPU_TX49XX,
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/*
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* TX3900 class processors
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*/
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CPU_TX3912, CPU_TX3922, CPU_TX3927,
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/*
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* MIPS32 class processors
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*/
@@ -367,7 +362,6 @@ enum cpu_type_enum {
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#define MIPS_CPU_4KEX BIT_ULL( 1) /* "R4K" exception model */
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#define MIPS_CPU_3K_CACHE BIT_ULL( 2) /* R3000-style caches */
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#define MIPS_CPU_4K_CACHE BIT_ULL( 3) /* R4000-style caches */
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#define MIPS_CPU_TX39_CACHE BIT_ULL( 4) /* TX3900-style caches */
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#define MIPS_CPU_FPU BIT_ULL( 5) /* CPU has FPU */
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#define MIPS_CPU_32FPR BIT_ULL( 6) /* 32 dbl. prec. FP registers */
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#define MIPS_CPU_COUNTER BIT_ULL( 7) /* Cycle count/compare */

‎arch/mips/include/asm/isadep.h

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@@ -10,7 +10,7 @@
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#ifndef __ASM_ISADEP_H
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#define __ASM_ISADEP_H
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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#if defined(CONFIG_CPU_R3000)
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/*
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* R2000 or R3000
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*/

‎arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0
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#define cpu_has_counter 1

‎arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h

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@@ -6,7 +6,6 @@
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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0
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#define cpu_has_counter 1

‎arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 0
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#define cpu_has_tx39_cache 0
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#define cpu_has_counter 1
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#define cpu_has_watch 1
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#define cpu_has_divec 1

‎arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_32fpr 1
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#define cpu_has_counter 1
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#define cpu_has_watch 0

‎arch/mips/include/asm/mach-dec/cpu-feature-overrides.h

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#define cpu_has_rixiex 0
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#define cpu_has_maar 0
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#define cpu_has_rw_llb 0
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#define cpu_has_tx39_cache 0
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#define cpu_has_divec 0
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#define cpu_has_prefetch 0
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#define cpu_has_mcheck 0

‎arch/mips/include/asm/mach-ingenic/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_counter 0
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#define cpu_has_watch 1
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#define cpu_has_divec 1

‎arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_fpu 1
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#define cpu_has_nofpuex 0
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#define cpu_has_32fpr 1

‎arch/mips/include/asm/mach-ip30/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_fpu 1
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#define cpu_has_nofpuex 0
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#define cpu_has_32fpr 1

‎arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-loongson2ef/cpu-feature-overrides.h

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#define cpu_has_mipsmt 0
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#define cpu_has_smartmips 0
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#define cpu_has_tlb 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_vce 0
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#define cpu_has_veic 0
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#define cpu_has_vint 0

‎arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h

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#define cpu_has_mipsmt 0
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#define cpu_has_smartmips 0
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#define cpu_has_tlb 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_vce 0
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#define cpu_has_veic 0
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#define cpu_has_vint 0

‎arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h

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#define cpu_has_4kex 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_sb1_cache 0
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#define cpu_has_fpu 0
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#define cpu_has_32fpr 0

‎arch/mips/include/asm/mach-tx39xx/ioremap.h

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