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arm64: dts: marvell: espressobin-ultra: fix Ethernet Switch unit address
The Espressobin Ultra DTS includes Espressobin DTSI which defines ethernet-switch@1 node. The Ultra DTS overrides "reg" to 3, but that leaves still old unit address which conflicts with the new phy@1 node (W=1 dtc warning): armada-3720-espressobin.dtsi:148.29-203.4: Warning (unique_unit_address_if_enabled): /soc/internal-regs@d0000000/mdio@32004/ethernet-switch@1: duplicate unit-address (also used in node /soc/internal-regs@d0000000/mdio@32004/ethernet-phy@1) Fix this by deleting ethernet-switch@1 node and merging original node with code from Ultra DTS into new ethernet-switch@3. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts

Lines changed: 64 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -114,54 +114,84 @@
114114
};
115115

116116
&mdio {
117+
/* Switch is @3, not @1 */
118+
/delete-node/ ethernet-switch@1;
117119
extphy: ethernet-phy@1 {
118120
reg = <1>;
119121

120122
reset-gpios = <&gpionb 2 GPIO_ACTIVE_LOW>;
121123
};
122-
};
123124

124-
&switch0 {
125-
reg = <3>;
125+
switch0: ethernet-switch@3 {
126+
compatible = "marvell,mv88e6085";
127+
reg = <3>;
126128

127-
reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;
129+
reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;
130+
dsa,member = <0 0>;
128131

129-
ethernet-ports {
130-
switch0port1: ethernet-port@1 {
131-
reg = <1>;
132-
label = "lan0";
133-
phy-handle = <&switch0phy0>;
134-
};
132+
ethernet-ports {
133+
#address-cells = <1>;
134+
#size-cells = <0>;
135+
136+
switch0port0: ethernet-port@0 {
137+
reg = <0>;
138+
label = "cpu";
139+
ethernet = <&eth0>;
140+
phy-mode = "rgmii-id";
141+
fixed-link {
142+
speed = <1000>;
143+
full-duplex;
144+
};
145+
};
135146

136-
switch0port2: ethernet-port@2 {
137-
reg = <2>;
138-
label = "lan1";
139-
phy-handle = <&switch0phy1>;
140-
};
147+
switch0port1: ethernet-port@1 {
148+
reg = <1>;
149+
label = "lan0";
150+
phy-handle = <&switch0phy0>;
151+
};
141152

142-
switch0port3: ethernet-port@3 {
143-
reg = <3>;
144-
label = "lan2";
145-
phy-handle = <&switch0phy2>;
146-
};
153+
switch0port2: ethernet-port@2 {
154+
reg = <2>;
155+
label = "lan1";
156+
phy-handle = <&switch0phy1>;
157+
};
147158

148-
switch0port4: ethernet-port@4 {
149-
reg = <4>;
150-
label = "lan3";
151-
phy-handle = <&switch0phy3>;
152-
};
159+
switch0port3: ethernet-port@3 {
160+
reg = <3>;
161+
label = "lan2";
162+
phy-handle = <&switch0phy2>;
163+
};
153164

154-
switch0port5: ethernet-port@5 {
155-
reg = <5>;
156-
label = "wan";
157-
phy-handle = <&extphy>;
158-
phy-mode = "sgmii";
165+
switch0port4: ethernet-port@4 {
166+
reg = <4>;
167+
label = "lan3";
168+
phy-handle = <&switch0phy3>;
169+
};
170+
171+
switch0port5: ethernet-port@5 {
172+
reg = <5>;
173+
label = "wan";
174+
phy-handle = <&extphy>;
175+
phy-mode = "sgmii";
176+
};
159177
};
160-
};
161178

162-
mdio {
163-
switch0phy3: ethernet-phy@14 {
164-
reg = <0x14>;
179+
mdio {
180+
#address-cells = <1>;
181+
#size-cells = <0>;
182+
183+
switch0phy0: ethernet-phy@11 {
184+
reg = <0x11>;
185+
};
186+
switch0phy1: ethernet-phy@12 {
187+
reg = <0x12>;
188+
};
189+
switch0phy2: ethernet-phy@13 {
190+
reg = <0x13>;
191+
};
192+
switch0phy3: ethernet-phy@14 {
193+
reg = <0x14>;
194+
};
165195
};
166196
};
167197
};

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