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Merge tag 'amlogic-arm64-dt-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt-late
Amlogic ARM64 DT changes for v6.10: - New Boards: - MNT Reform 2 CM4 adapter with a BPI-CM4 Module - AV400 (Amlogic A5) - BA400 (Amlogic A4) - Initial Amlogic A4 & A5 support - MIPI DSI support for G12A, G12B & SM1 SoCs - Overlay for Khadas TS050 panel for the Khadas VIM3/VIM3L - Amlogic T7 reset controller * tag 'amlogic-arm64-dt-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: amlogic: Add Amlogic T7 reset controller arm64: dts: add support for A5 based Amlogic AV400 arm64: dts: add support for A4 based Amlogic BA400 dt-bindings: serial: amlogic,meson-uart: Add compatible string for A4 dt-bindings: arm: amlogic: add A5 support dt-bindings: arm: amlogic: add A4 support arm64: dts: meson: fix S4 power-controller node arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper arm64: meson: khadas-vim3l: add TS050 DSI panel overlay arm64: meson: g12-common: add the MIPI DSI nodes dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module Link: https://lore.kernel.org/r/6030a450-fb4e-4e27-a5c3-6f4e0f326d9a@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents fec50db + a42f2e9 commit 24ae5d2

14 files changed

+1028
-5
lines changed

‎Documentation/devicetree/bindings/arm/amlogic.yaml

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@@ -157,6 +157,7 @@ properties:
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items:
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- enum:
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- bananapi,bpi-cm4io
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- mntre,reform2-cm4
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- const: bananapi,bpi-cm4
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- const: amlogic,a311d
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- const: amlogic,g12b
@@ -201,6 +202,18 @@ properties:
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- amlogic,ad402
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- const: amlogic,a1
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- description: Boards with the Amlogic A4 A113L2 SoC
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items:
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- enum:
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- amlogic,ba400
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- const: amlogic,a4
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- description: Boards with the Amlogic A5 A113X2 SoC
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items:
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- enum:
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- amlogic,av400
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- const: amlogic,a5
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- description: Boards with the Amlogic C3 C302X/C308L SoC
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items:
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- enum:

‎Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml

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@@ -54,7 +54,9 @@ properties:
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- const: amlogic,meson-gx-uart
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- description: UART controller on S4 compatible SoCs
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items:
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- const: amlogic,t7-uart
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- enum:
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- amlogic,a4-uart
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- amlogic,t7-uart
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- const: amlogic,meson-s4-uart
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reg:

‎arch/arm64/boot/dts/amlogic/Makefile

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@@ -1,4 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
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dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
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dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
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dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
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dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
@@ -16,7 +18,9 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3-ts050.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-mnt-reform2.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb
@@ -76,6 +80,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m2-pro.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-h96-max.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l-ts050.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-s905d3-libretech-cc.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb
@@ -86,3 +91,5 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
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# Overlays
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meson-g12a-fbx8am-brcm-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-brcm.dtbo
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meson-g12a-fbx8am-realtek-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-realtek.dtbo
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meson-g12b-a311d-khadas-vim3-ts050-dtbs := meson-g12b-a311d-khadas-vim3.dtb meson-khadas-vim3-ts050.dtbo
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meson-sm1-khadas-vim3l-ts050-dtbs := meson-sm1-khadas-vim3l.dtb meson-khadas-vim3-ts050.dtbo

‎arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts

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@@ -0,0 +1,42 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
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*/
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/dts-v1/;
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#include "amlogic-a4.dtsi"
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/ {
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model = "Amlogic A113L2 ba400 Development Board";
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compatible = "amlogic,ba400", "amlogic,a4";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &uart_b;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x40000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* 10 MiB reserved for ARM Trusted Firmware */
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secmon_reserved: secmon@5000000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0x05000000 0x0 0xa00000>;
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no-map;
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};
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};
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};
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&uart_b {
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status = "okay";
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};

‎arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi

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@@ -0,0 +1,66 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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xtal: xtal-clk {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "xtal";
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#clock-cells = <0>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gic: interrupt-controller@fff01000 {
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compatible = "arm,gic-400";
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reg = <0x0 0xfff01000 0 0x1000>,
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<0x0 0xfff02000 0 0x2000>,
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<0x0 0xfff04000 0 0x2000>,
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<0x0 0xfff06000 0 0x2000>;
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#interrupt-cells = <3>;
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#address-cells = <0>;
44+
interrupt-controller;
45+
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
46+
};
47+
48+
apb: bus@fe000000 {
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compatible = "simple-bus";
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reg = <0x0 0xfe000000 0x0 0x480000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
54+
55+
uart_b: serial@7a000 {
56+
compatible = "amlogic,a4-uart",
57+
"amlogic,meson-s4-uart";
58+
reg = <0x0 0x7a000 0x0 0x18>;
59+
interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
60+
clocks = <&xtal>, <&xtal>, <&xtal>;
61+
clock-names = "xtal", "pclk", "baud";
62+
status = "disabled";
63+
};
64+
};
65+
};
66+
};

‎arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
4+
*/
5+
6+
#include "amlogic-a4-common.dtsi"
7+
/ {
8+
cpus {
9+
#address-cells = <2>;
10+
#size-cells = <0>;
11+
12+
cpu0: cpu@0 {
13+
device_type = "cpu";
14+
compatible = "arm,cortex-a53";
15+
reg = <0x0 0x0>;
16+
enable-method = "psci";
17+
};
18+
19+
cpu1: cpu@1 {
20+
device_type = "cpu";
21+
compatible = "arm,cortex-a53";
22+
reg = <0x0 0x1>;
23+
enable-method = "psci";
24+
};
25+
26+
cpu2: cpu@2 {
27+
device_type = "cpu";
28+
compatible = "arm,cortex-a53";
29+
reg = <0x0 0x2>;
30+
enable-method = "psci";
31+
};
32+
33+
cpu3: cpu@3 {
34+
device_type = "cpu";
35+
compatible = "arm,cortex-a53";
36+
reg = <0x0 0x3>;
37+
enable-method = "psci";
38+
};
39+
};
40+
};

‎arch/arm64/boot/dts/amlogic/amlogic-a5-a113x2-av400.dts

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1+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
4+
*/
5+
6+
/dts-v1/;
7+
8+
#include "amlogic-a5.dtsi"
9+
10+
/ {
11+
model = "Amlogic A113X2 av400 Development Board";
12+
compatible = "amlogic,av400", "amlogic,a5";
13+
interrupt-parent = <&gic>;
14+
#address-cells = <2>;
15+
#size-cells = <2>;
16+
17+
aliases {
18+
serial0 = &uart_b;
19+
};
20+
21+
memory@0 {
22+
device_type = "memory";
23+
reg = <0x0 0x0 0x0 0x40000000>;
24+
};
25+
26+
reserved-memory {
27+
#address-cells = <2>;
28+
#size-cells = <2>;
29+
ranges;
30+
31+
/* 10 MiB reserved for ARM Trusted Firmware */
32+
secmon_reserved: secmon@5000000 {
33+
compatible = "shared-dma-pool";
34+
reg = <0x0 0x05000000 0x0 0xa00000>;
35+
no-map;
36+
};
37+
};
38+
};
39+
40+
&uart_b {
41+
status = "okay";
42+
};

‎arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi

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@@ -0,0 +1,40 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
4+
*/
5+
6+
#include "amlogic-a4-common.dtsi"
7+
/ {
8+
cpus {
9+
#address-cells = <2>;
10+
#size-cells = <0>;
11+
12+
cpu0: cpu@0 {
13+
device_type = "cpu";
14+
compatible = "arm,cortex-a55";
15+
reg = <0x0 0x0>;
16+
enable-method = "psci";
17+
};
18+
19+
cpu1: cpu@100 {
20+
device_type = "cpu";
21+
compatible = "arm,cortex-a55";
22+
reg = <0x0 0x100>;
23+
enable-method = "psci";
24+
};
25+
26+
cpu2: cpu@200 {
27+
device_type = "cpu";
28+
compatible = "arm,cortex-a55";
29+
reg = <0x0 0x200>;
30+
enable-method = "psci";
31+
};
32+
33+
cpu3: cpu@300 {
34+
device_type = "cpu";
35+
compatible = "arm,cortex-a55";
36+
reg = <0x0 0x300>;
37+
enable-method = "psci";
38+
};
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};
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};

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