Test-me: rebased dts files (not working)

Author: maidnl

meta-arduino-bsp/recipes-bsp/u-boot/u-boot-imx/portenta-x8/imx8mm-evk-u-boot.dtsi

@@ -39,35 +39,29 @@
 	};
 };
 
-&aips4 {
+&{/soc@0} {
+	u-boot,dm-pre-reloc;
 	u-boot,dm-spl;
 };
 
-&reg_usdhc2_vmmc {
-	u-boot,off-on-delay-us = <20000>;
-	u-boot,dm-spl;
+&A53_0 {
+	/delete-property/ cpu-idle-states;
 };
 
-&pinctrl_reg_usdhc2_vmmc {
-	u-boot,dm-spl;
+&A53_1 {
+	/delete-property/ cpu-idle-states;
 };
 
-&pinctrl_uart2 {
-	u-boot,dm-spl;
+&A53_2 {
+	/delete-property/ cpu-idle-states;
 };
 
-&pinctrl_usdhc2_gpio {
-	u-boot,dm-spl;
+&A53_3 {
+	/delete-property/ cpu-idle-states;
 };
-
-&pinctrl_usdhc2 {
+&i2c2 {
 	u-boot,dm-spl;
 };
-
-&pinctrl_usdhc3 {
-	u-boot,dm-spl;
-};
-
 &gpio1 {
 	u-boot,dm-spl;
 };
@@ -88,45 +82,6 @@
 	u-boot,dm-spl;
 };
 
-&uart2 {
-	u-boot,dm-spl;
-};
-
-&crypto {
-	u-boot,dm-spl;
-};
-
-&sec_jr0 {
-	u-boot,dm-spl;
-};
-
-&sec_jr1 {
-	u-boot,dm-spl;
-};
-
-&sec_jr2 {
-	u-boot,dm-spl;
-};
-
-&usbmisc1 {
-	u-boot,dm-spl;
-};
-
-&usbphynop1 {
-	u-boot,dm-spl;
-};
-
-&usbotg1 {
-	u-boot,dm-spl;
-};
-
-&usdhc1 {
-	u-boot,dm-spl;
-	assigned-clocks = <&clk IMX8MM_CLK_USDHC1>;
-	assigned-clock-rates = <400000000>;
-	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_400M>;
-};
-
 &usdhc2 {
 	u-boot,dm-spl;
 	sd-uhs-sdr104;
@@ -150,14 +105,15 @@
 	u-boot,dm-spl;
 };
 
-&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} {
+&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
 	u-boot,dm-spl;
 };
 
-&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} {
+&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} {
 	u-boot,dm-spl;
 };
 
+
 &pinctrl_i2c1 {
 	u-boot,dm-spl;
 };
@@ -166,31 +122,27 @@
 	u-boot,dm-spl;
 };
 
-&pinctrl_wdog {
-	u-boot,dm-spl;
-};
-
 &fec1 {
-	phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
-	phy-reset-duration = <15>;
-	phy-reset-post-delay = <100>;
-};
-
-&ethphy0 {
-	vddio0: vddio-regulator {
-		regulator-name = "VDDIO";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-	};
+	phy-reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <100>;
+	phy-reset-post-delay = <1>;
 };
 
 &wdog1 {
 	u-boot,dm-spl;
 };
 
-&usbotg1 {
-	status = "okay";
-	extcon = <&ptn5110>;
+&flexspi {
+	assigned-clock-rates = <100000000>;
+	assigned-clocks = <&clk IMX8MM_CLK_QSPI>;
+	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
+};
+
+&lcdif {
+	enable_polarity_low;
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-parents;
+	/delete-property/ assigned-clock-rates;
 };
 
 &mipi_dsi {